Memory of the modern computer is characterized by several parameters.
The most famous - is the volume and frequency, but also an important indicator of a memory latency, otherwise known timing.
RAM computer memory (RAM) -volatile memory, which contains the operating system components and programs that are running. The amount of memory affects how much information it can be contained at the same time, and accordingly - and the number of running applications. The frequency characteristic of the memory speed, that is, the number of operations (cycles) per second.
The ancestor of computer memory was created in 1834 by Charles Babbage. This is a mechanical device, referred to as the "Warehouse» (store), store intermediate results of calculations of the "Analytical Machine".
Latency, or timings, show the number of cycles spent on internal operations, in other words, the timings are characterized by simple memory.
memory access principle
To understand the timing of certain costselaborate on the memory access. Simplistically memory chip can be represented as a table where each cell corresponds to the memory items stored one bit.
When selecting a specific cell through the addressbus passed the column number and row. The first gate pulse is applied to the access line - RAS (Row Access Strobe), then the momentum column access - CAS (Column Access Strobe).
After you select the cell it sends differentcontrol pulses - check access to the recording, writing, reading or reloading. Moreover, there are delays that are called latency between operations.
There are four different timing indicates the memory module manufacturers.
CL (CAS-latensy) - CAS-delay - this expectation between CAS pulse and the start of reading. In other words, the number of cycles required to read the cell, if necessary line is now open.
T RCD (Row Address to Column Address Delay) - the delay between the RAS and CAS pulses. Timing shows the time between the opening of the line and column discovery.
T RP (Row Precharge Time). This timing - delay between the impulse to close the active line and RAS pulse to the opening of the next.
Sometimes you can meet 6-6-6-18-24 record type. Here, the fifth number is the timing Command rate - pulse delay between the choice of chips in the memory module and the activation of the line.
The sum of these timing characterizes the delay betweenreading a specific memory location, if you open another line. Manufacturers often indicate precisely these three parameters, but sometimes you can see a fourth - T RAS.
T RAS (Row Active Time) - the number of cycles between RAS-pulse and the pulse of the closing line (Precharge), ie the time-line updates. Typically T RAS is equal to three previous timings.
For convenience, timings result without hyphenated designations, such as 2-2-2 or 2-2-2-6.